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基于CompactPCI体系的高性能监测测向处理平台研究
引用本文:康凯,朱然刚,胡磊. 基于CompactPCI体系的高性能监测测向处理平台研究[J]. 电子技术应用, 2010, 36(5)
作者姓名:康凯  朱然刚  胡磊
作者单位:电子工程学院,安徽,合肥,230037
摘    要:提出一种新的高速并行采样技术架构以及基于可编程芯片技术和支持灵活配置的并行处理嵌入式硬件架构。该平台集多通道高速采集、大容量数据存储、高性能DSP与大规模FPGA紧耦合实时处理等功能于一体,在综合集成与应用方面具有创新性,能够保障对多模式、多速率、多频段信号分析在信号层上频域的宽阔全覆盖和时域的连续性,同时又因其硬件上提供了丰富的资源裕量,因而可以满足信息层上对多种标准和协议分析的需求及应对其未来的演进。

关 键 词:CPCI总线  一体化  现场可编程门阵列  数字信号处理器

Studying on high-performance surveillance and ganiometry processing platform based on CPCI bus
KANG Kai,ZHU Ran Gang,HU Lei. Studying on high-performance surveillance and ganiometry processing platform based on CPCI bus[J]. Application of Electronic Technique, 2010, 36(5)
Authors:KANG Kai  ZHU Ran Gang  HU Lei
Affiliation:KANG Kai,ZHU Ran Gang,HU Lei (Electronic Engineering Institute,Hefei 230037,China)
Abstract:This paper presents a new high-speed parallel sampling framework and a parallel processing of embedded hardware architecture which is based on programmable chip technology and flexible configuration supporting method. Building upon multichannel high-speed acquisition, large-capacity data storage, high-performance DSP and FPGA tightly coupled large -scale real-time processing unit, such a platform hold innovative application property in comprehensive integration studying, which not only guaranteed the right ...
Keywords:CPCI bus  integration design  FPGA  DSP  
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