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MOS门电路测试过程中功率损耗最小化
引用本文:闫林.MOS门电路测试过程中功率损耗最小化[J].微电子学与计算机,2000,17(2):39-41.
作者姓名:闫林
作者单位:广东中山学院电子系,广东,528403
摘    要:MOS逻辑门电路的功率损耗与其门电路的输出翻转成正比。在测试过程中,输出节点反转速率远高于正常使用时,很容易造成电路损坏。因此,在测试过程中减少逻辑门输出翻转速率具有重要意义。文章提出减少MOS门输出翻转速率的一些方法,有助于有效解决这一问题。该方法具有实现简单、编程方便等优点。

关 键 词:功率损耗  测试码生成  MOS门电路  测试过程
修稿时间:1999-08-24

Heat Dissipation minization for MOS Gate during Test Application
YAN Lin.Heat Dissipation minization for MOS Gate during Test Application[J].Microelectronics & Computer,2000,17(2):39-41.
Authors:YAN Lin
Abstract:Heat dissipation in MOS gate is in direct Proportion to its output switching activity.When its switching activity during test application is much higher than that is in its normal operation,the MOS gate can be easily damaged due to excessive heat dissipation.Hence,reducing the switching activity during test application is of great importance.Several methods are provided here,which can effectively solove the problem of how to reduce switching activity,and which possess the advantages of easily programming and accomplishing.
Keywords:MOS gate  Heat dissipation  Test code generation  Output switching activity
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