Neural net analysis of integrated circuit yield dependence on CMOS process control parameters |
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Authors: | M. Karilahti |
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Affiliation: | Optoelectronics Laboratory, Helsinki University of Technology, P.O. Box 3000, FIN-02015 TKK, Espoo, Finland |
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Abstract: | In this practical case study the method of self-organizing map (SOM) neural net is applied to analyze a CMOS process problem, where the device under study is a heartbeat rate monitor integrated circuit. The wafer yield is analyzed against the process control monitoring (PCM) parameter measurement values. The SOM efficiently reduces the parameter space dimensions and helps in visualizing the different parameter relations. This makes it possible to identify the most probable PCM parameters affecting the yield. Those were found out to be NMOS transistor drain current and aluminium sheet resistance. |
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