| 基于FPGA的通信系统基带验证平台的设计 |
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| 引用本文： | 沈梁,蒋一琦.基于FPGA的通信系统基带验证平台的设计[J].国外电子元器件,2006(9):7-10. |
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| 作者姓名： | 沈梁 蒋一琦 |
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| 作者单位： | 东南大学,无线电工程系,江苏,南京,210096 |
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| 基金项目： | 国家高技术研究发展计划(863计划) |
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| 摘 要： | 本文提出了一种基于FPGA的通信系统基带验证平台的设计方案.该平台采用两片高性能三百万门级的FPGA器件和高速模数/数模转换器,为通信系统的基带设计提供了一个硬件实现和算法验证平台.
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| 关 键 词： | FPGA 基带设计 模/数转换器 数/模转换器 |
| 文章编号： | 1006-6977（2006）09-0007-04 |
| 收稿时间： | 2006-04-13 |
| 修稿时间： | 2006-04-13 |
Design of FPGA-based platform for communication baseband design and validation |
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| SHEN Liang,JIANG Yi-qi.Design of FPGA-based platform for communication baseband design and validation[J].International Electronic Elements,2006(9):7-10. |
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| Authors: | SHEN Liang JIANG Yi-qi |
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| Affiliation: | Department of Electronic Engineering, Southeast University, Nanjing 210096, China |
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| Abstract: | A design of FPGA-based platform for communication baseband design and validation is proposed, which uses two high-performance FPGA chips with 3 million gates, high speed ADC and DAC.h provides a platform for the hardware design and algorithmic validation of a communication baseband design. |
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| Keywords: | FPGA baseband design ADC DAC |
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