| 基于PCI总线的超高速数据采集系统的设计与实现 |
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| 引用本文： | 谢前进. 基于PCI总线的超高速数据采集系统的设计与实现[J]. 计算机测量与控制, 2002, 10(9): 612-613 |
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| 作者姓名： | 谢前进 |
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| 作者单位： | 北京理工大学,电子工程系,北京,100081 |
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| 基金项目： | 国防科技跨行业基金资助项目 ( 99J1.3.3BQ0 10 6 ) |
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| 摘 要： | 研究了PCI计算机总线超高速数据采集与DSP系统的设计与实现。系统采用PCI总线及I，Q支路双通道设计，通道采样率均为500MHz，系统存储深度为2MB,中央处理器采用高速DSP TMS320C6202，时序和逻辑电路由E－PLD实现。实际测试结果表明，系统工作正常，证明系统原理与硬件设计是成功的。
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| 关 键 词： | PCI总线 超高速数据采集系统 设计 |
| 文章编号： | 1671-4598(2002)09-0612-02 |
| 修稿时间： | 2002-01-20 |
Design and Realization of Ultra High Speed Data Acquisition and DSP System Based on PCI Bus |
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| XIE Qian-jin. Design and Realization of Ultra High Speed Data Acquisition and DSP System Based on PCI Bus[J]. Computer Measurement & Control, 2002, 10(9): 612-613 |
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| Authors: | XIE Qian-jin |
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| Abstract: | The design and realization of ultra high speed data acquisition and DSP system based on PCI bus are discussed.PCI bus and I,Q channels are adopted in the design and the sampling rate in each channel reached 500MHz.The memory deep of the system is 2MB and CPU is DSP TMS320C6202.The timing and logic function are fulfilled by EPLD. The test result indicates that the system works normally and the system principle and hardware design are successful. |
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| Keywords: | ultra high speed data acquisition PCIbus PCIbus target interface |
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