一种宽带多模数字抽取滤波器

提出了一种应用于连续时间Σ-Δ ADC的多模数字抽取滤波器。通过采用不同类型滤波器级联结构,合理分配不同级间下采样因子,有效降低了电路复杂度、面积和功耗。通过级间滤波器相互配合,实现了该滤波器的多带宽、多模式功能。基于65 nm CMOS工艺进行后端设计,仿真结果表明,该多模抽取滤波器的工作带宽为20~50 MHz,当工作带宽为20 MHz和50 MHz时,有效位数分别为10.64位和10.48位。

A Multi-Mode Wideband Digital Decimation Filter

A multi-mode wideband digital decimation filter used in continuous-time (CT) sigma-delta converter was proposed. The decimation filter adopted cascade structures with different types of filter, and reasonably allocated down-sampling factors between different stages. By this way, the complexity of circuit implementation was effectively simplified, and the area and power consumption of the circuit were reduced as well. Furthermore, the multi-bandwidth and multi-mode functions of the filter were realized through cooperation of inter-stage filters. Finally, the designed filter was implemented in a 65 nm CMOS process. The simulation results indicated that the operating bandwidth range of the filter was from 20 MHz up to 50 MHz. With a bandwidth of 20 MHz, the corresponding ENOB was 10.64 bit. When operating in the 50 MHz mode, the corresponding ENOB was 10.48 bit.