高性能ZnV Sb系压敏电阻陶瓷的制备

在传统工艺基础上,对V2O5/Sb2O3混合粉体先进行热处理,然后以热处理产物为主要掺杂剂,在950℃合成了显微结构均匀、相对密度98%以上、α大于50的ZnVSb系多元压敏电阻陶瓷材料。并研究了V2O5/Sb2O3预合成粉含量对材料显微结构和性能的影响。结果表明:V2O5/Sb2O3预合成粉含量升高,增大了晶界受主态密度,提高了材料的晶界势垒,使材料在压敏电压升高的同时,非线性系数得到改善。

Fabrication of High Performance ZnVSb System Varistor Ceramics

A series of ZnO-V2O5 based varistor ceramics, which have homogenous microstructure, high relative density of more than 98 % and an optimum non-ohmic coefficient α of more than 50, were fabricated at 950 ℃ by traditional electroceramic fabrication process. The pre-synthesized V2O5/Sb2O3 compound was added as the main dopants, while several other transient metal oxides were co-doped as well. Obtained results show that the increase of pre-synthesized V/Sb compound leads the concentration of donor typed defects to increase in the vicinity of grain boundaries, so as to form potential barriers, high enough to result good current-voltage nonlinearity in the ceramics. This would bring more potentiality to ZnO-V2O5 based ceramics in producing low-voltage multilayered varistor.