| 基于FPGA的高速误码插入技术分析 |
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| 引用本文： | 程翰林.基于FPGA的高速误码插入技术分析[J].无线电工程,2010,40(10):4-6,37. |
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| 作者姓名： | 程翰林 |
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| 作者单位： | 桂林电子科技大学,信息与通信学院,广西,桂林,541004 |
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| 摘 要： | 随机误码插入技术用于数字网传输损伤模拟系统,以模拟信号在信道中的误码损伤。提出了当前误码损伤模拟设备存在处理速度慢、效率不高的问题,针对此问题分析了基于FPGA的误码插入常规方法。在此基础上提出了一种新型的高速并行误码插入方案,该方案采用线性反馈移位寄存器构造多路随机数发生器,同时保证误码图案的等效性,实现了对信号的并行处理。进行了测试,结果符合指标要求,性能良好,便于实现。
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| 关 键 词： | 误码损伤 模拟 高速 并行 伪随机数发生器 随机误码 FPGA |
Research of High Speed Error Code Insertion Technology Based on FPGA |
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| CHENG Han-lin.Research of High Speed Error Code Insertion Technology Based on FPGA[J].Radio Engineering of China,2010,40(10):4-6,37. |
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| Authors: | CHENG Han-lin |
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| Affiliation: | CHENG Han-lin(College of Information and Communication of Guilin University of Electronic Technology,Guilin Guangxi 541004,China) |
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| Abstract: | Random error code insertion technology is used in simulation systems of transmission impairments in digital network to simulate the error impairment of signals in transmission channel.To begin with,the problem of low speed and efficiency which exists in current error impairment simulation equipment is presented.Then the drawbacks of the conventional method based on FPGA are analyzed for this problem,by doing so a new solution of high-speed random error code insertion in parallel mode is discussed,which proves to be able to meet the specification requirement by test.With guarantee of equivalence of error pattern,the random number generator is constituted by using LFSRs.The solution is feasible with good performances. |
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| Keywords: | FPGA |
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