Electrical Characteristics of Triple‐Gate RSO Power MOSFET (TGRMOS) with Various Gate Configurations and Bias Conditions

In this paper, we propose a triple‐gate trench power MOSFET (TGRMOS) that is made through a modified RESURF stepped oxide (RSO) process, that is, the nitride_RSO process. The electrical characteristics of TGRMOSs, such as the blocking voltage (BV_DS) and on‐state current (I_D,MAX), are strongly dependent on the gate configuration and its bias condition. In the nitride_RSO process, the thick single insulation layer (SiO₂) of a conventional RSO power MOSFET is changed to a multilayered insulator (SiO₂/SiN_x/TEOS). The inserted SiN_x layer can create the selective etching of the TEOS layer between the gate oxide and poly‐Si layers. After additional oxidation and the poly‐Si filling processes, the gates are automatically separated into three parts. Moreover, to confirm the variation in the electrical properties of TGRMOSs, such as BV_DS and I_D,MAX, simulation studies are performed on the function of the gate configurations and their bias conditions. BV_DS and I_D,MAX are controlled from 87 V to 152 V and from 0.14 mA to 0.24 mA at a 15‐V gate voltage. This I_D,MAX variation indicates the specific on‐resistance modulation.