Low frequency noise in 0.12 μm partially and fully depleted SOI technology |
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Authors: | Franois Dieudonn Sbastien Haendler Jalal Jomaah Francis Balestra |
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Affiliation: | IMEP, ENSERG, 23 rue des Martyrs, 38016, Grenoble Cedex 1, France |
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Abstract: | Low frequency noise characterization of 0.12 μm silicon-on-insulator (SOI) CMOS technology is for the first time performed for partially and fully depleted N-MOSFETs. Static performances of the experimental devices are first presented, then we address the drain current fluctuations in both linear and saturation regimes. Taking into consideration the usually admitted 1/f noise models in MOS devices and their applicability in our case, we point out an enhancement of the extracted trap densities for both architectures compared to previously obtained results in 0.25 μm SOI CMOS technology. As regards drain current spectral densities in saturation mode, we notice some peculiarities occurring for the Kink-related excess noise. |
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