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边缘注入对H型栅SOI pMOSFETs亚阈值泄漏电流的影响
引用本文:吴峻峰, 李多力, 毕津顺, 薛丽君, 海潮和,. 边缘注入对H型栅SOI pMOSFETs亚阈值泄漏电流的影响[J]. 电子器件, 2006, 29(4): 996-999,1003
作者姓名:吴峻峰   李多力   毕津顺   薛丽君   海潮和  
作者单位:中国科学院微电子所,北京,100029;中国科学院微电子所,北京,100029;中国科学院微电子所,北京,100029;中国科学院微电子所,北京,100029;中国科学院微电子所,北京,100029
摘    要:就不同边缘注入剂量对H型栅SOI pMOSFETs亚阈值泄漏电流的影响进行了研究。实验结果表明不足的边缘注入将会产生边缘背栅寄生晶体管,并且在高的背栅压下会产生明显的泄漏电流。分析表明尽管H型栅结构的器件在源和漏之间没有直接的边缘泄漏通路,但是在有源扩展区部分,由于LOCOS技术引起的硅膜减薄和剂量损失仍就促使了边缘背栅阈值电压的降低。

关 键 词:亚阈值泄漏电流  H型栅  pMOSFET
文章编号:1005-9490(2006)04-0996-04
收稿时间:2006-01-16
修稿时间:2006-01-16

Influence of Edge Implant on Subthreshold Leakage Current of H-Gate SOI pMOSFETs
WU Jun-feng,LI Duo-li,BI Jin-shun,XUE Li-jun,HAI Chao-he. Influence of Edge Implant on Subthreshold Leakage Current of H-Gate SOI pMOSFETs[J]. Journal of Electron Devices, 2006, 29(4): 996-999,1003
Authors:WU Jun-feng  LI Duo-li  BI Jin-shun  XUE Li-jun  HAI Chao-he
Affiliation:Institute of Microelectronics of Chinese Academy of Sciences, Beijing 100029, China
Abstract:The research on the influence of edge implant on subthreshold leakage current of H-gate SOI pMOSFETs doses was made. The experimental results show that insufficient field implant doses for H- gate pMOSFETs devices will lead to an observable edge back-gate transistor and obvious subthreshold leakage current of the device under a higher back gate bias. The analysis of device structure and process simulation demonstrate that although this kind of devices has no direct edge leakage path between source and drain, thinning of silicon film and dose loss induced by LOCOS technology can still cause the lowered threshold voltage of back gate in edge parts without enough edge implant.
Keywords:pMOSFET  subthreshold leakage current  H-gate  pMOSFET
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