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Analysis of a double-latch synchroniser circuit |
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| Authors: | Jackson TA Albicki A |
| Affiliation: | Dept. of Electr. Eng., Rochester Univ., NY, USA; |
| Abstract: | A model for a synchroniser composed of two serially connected D-latches is constructed and analysed to determine the mean time between failures. The analysis demonstrates that the best synchroniser reliability is obtained using a single-latch synchroniser.< |
| Keywords: | |