| 一种用于14位1.28MS/sΣΔADC的数字抽取滤波器设计 |
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| 引用本文： | 杨银堂,李迪,石立春. 一种用于14位1.28MS/sΣΔADC的数字抽取滤波器设计[J]. 西安电子科技大学学报(自然科学版), 2010, 37(2): 315-319. DOI: 10.3969/j.issn.1001-2400.2010.02.024 |
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| 作者姓名： | 杨银堂 李迪 石立春 |
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| 作者单位： | 西安电子科技大学,微电子学院,陕西,西安,710071 |
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| 基金项目： | 国家自然科学基金，教育部博士点基金 |
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| 摘 要： | 设计了一种数字抽取滤波器,此滤波器由多级级联结构组成,对sigma-delta调制器的输出信号进行滤波和64倍的降采样,具有较小的电路面积和较低的功耗.采用TSMC 0.18μm CMOS工艺实现,工作电压1.8V,流片测试结果表明:sigma-delta调制器输出信号经过数字抽取滤波器后,信噪失真比(SNDR)达到了93.9 dB,满足设计要求.所提出的数字抽取滤波器-6dB带宽为640kHz,抽取后的采样频率为1.28MHz,功耗为33mW,所占面积约为0.4mm×1.7mm.
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| 关 键 词： | ∑△调制器 模数转换器 数字抽取滤波器 FIR滤波器 CIC滤波器 |
| 收稿时间： | 2009-06-17 |
Decimation filter design for 14-bit 1.28MS/s sigma-delta ADC |
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| YANG Yin-tang,LI Di,SHI Li-chun. Decimation filter design for 14-bit 1.28MS/s sigma-delta ADC[J]. Journal of Xidian University, 2010, 37(2): 315-319. DOI: 10.3969/j.issn.1001-2400.2010.02.024 |
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| Authors: | YANG Yin-tang LI Di SHI Li-chun |
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| Affiliation: | (School of Microelectronic, Xidian Univ., Xi'an 710071， China) |
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| Abstract: | A decimation filter for a 4th-order single-bit single-loop oversampling sigma-delta modulator is designed. Consisting of multi stages, the decimation filter is used to filter the noise in the output signal of the modulator and has a decimation factor of 64. It has a small circuit area and low power dissipation. The filter has been fabricated by the TSMC 0.18μm CMOS process and operates at a voltage of 1.8V. Experimental results show that the output signal of the decimation filter has an SNDR (Signal-to-Noise-and-Distortion-Ratio) of 93.9dB which meets the requirement of the system design. The presented filter has a -6dB pass-band of 640kHz, a power dissipation of 33mW and occupies a die area of about 0.4mm×1.7mm. |
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| Keywords: | sigma-delta modulator ADC decimation filter FIR filter CIC filter |
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