| ITU-T J.83B系统中RS编码器的设计与FPGA实现 |
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| 引用本文： | 张燕.ITU-T J.83B系统中RS编码器的设计与FPGA实现[J].电子质量,2011(10):8-9,19. |
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| 作者姓名： | 张燕 |
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| 作者单位： | 电子科技大学电子工程学院,四川成都,611731 |
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| 摘 要： | 该文详细研究了ITU-T J.83B系统中RS（128,122）的工作原理,结合有限域上的乘加运算及常用实现方法,设计了符合此系统的RS编码器结构。采用Verilog语言编写RS编码器的实现代码并在MODELSIM中完成功能仿真,并进行验证。最后用ALTERA公司的FPGA芯片进行了实现,给出结果分析。
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| 关 键 词： | RS编码 有限域乘法 FPGA |
The Design Andlmplementation of RS Coder Based on FPGA in ITU-T J.83B System |
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| Zhang Yan.The Design Andlmplementation of RS Coder Based on FPGA in ITU-T J.83B System[J].Electronics Quality,2011(10):8-9,19. |
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| Authors: | Zhang Yan |
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| Affiliation: | Zhang Yan(School of Electronic Engineering,University of Electronic Science and Technique of China,Sichuan Chengdu 611731) |
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| Abstract: | This paper researched on the theory of the RS（128,122） code in ITU-T J.83B system.The coder structure of the RS code based on multiplication and addition in Galois Field is analyzed and designed.Using Verilog language code RS implementation code and complete function simulation in MODELSIM.An experimentation has been made using ALTERA＇s FPGA chip.At last,the result comparison and analyzation was given. |
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| Keywords: | RS code multiplication in galois field FieldProgrammable Gate Array |
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