一种面向微处理器验证的分层随机激励方法*

针对日趋复杂的微处理器功能验证，提出一种基于分层思想的受限随机激励产生方法，通过测试层、场景层、功能层和指令层的多层约束，实现随机激励在不同粒度范围的高度可控性，精炼测试空间，加快验证的收敛速度。采用可配置的功能库，将处理器功能行为单元作为随机激励的构建基础，产生逻辑功能与通信接口结合的随机激励，实现系列处理器的验证复用。CKCore处理器验证的实验结果表明，该方法与受限随机激励相比，在功能覆盖率相同的情况下，激励编写量减少60%；在仿真时间相同的情况下，功能和代码覆盖率分别改善10%和5%以上，有效提高处理器验证的质量和效率。

Multi-layer random stimulus strategy for microprocessor verification

To address the increasing complexity of microprocessor function verification, this paper presented a new multiple-layer constraint random stimulation generation strategy. Multi-layer constraints from four layers, test, scenario, function and command, could strengthen the controllability on random stimulus generation in different granularities, and refine the stimulus space to speed up the whole verification work. Moreover, based on those fundamental functional behavior units of microprocessor, proposed a new configurable function library to generate two kinds of random stimulus for internal logic function and external communication interface respectively with better reusability for series processor verification. As shown in CKCore microprocessor verification experiments, compare with traditional constraint random stimulus generation, the proposed strategy can effectively improve the quality and efficiency of microprocessor verification, with 60% stimulus coding reduction, while more than 10% and 5% function and code coverage increase.