首页 | 本学科首页   官方微博 | 高级检索  
     

基于AVR单片机和CPLD的姿态测试系统设计
引用本文:李慧,翟荣斌,范锦彪,原晓洁. 基于AVR单片机和CPLD的姿态测试系统设计[J]. 电子测试, 2011, 0(10): 39-41
作者姓名:李慧  翟荣斌  范锦彪  原晓洁
作者单位:中北大学电子测试技术国家重点实验室,山西太原,030051
摘    要:本系统采用CPLD和AVR单片机作为逻辑控制核心,设计了姿态存储测试系统,以实现姿态信息的采集、编帧和存储。详细介绍了姿态测试系统的工作原理和硬件设计。利用AVR单片机,控制数据的写、读、擦除操作,利用CPLD的逻辑控制功能完善了存储测试系统的各个工作状态,提高了存储测试系统工作的可靠性。验证了该系统可以完成对模拟信号...

关 键 词:姿态测试  CPLD  AVR单片机

Design of posture test system based on AVR and CPLD
Li Hui,Zhai Rongbin,Fan Jinbiao,Yuan Xiaojie. Design of posture test system based on AVR and CPLD[J]. Electronic Test, 2011, 0(10): 39-41
Authors:Li Hui  Zhai Rongbin  Fan Jinbiao  Yuan Xiaojie
Affiliation:Li Hui,Zhai Rongbin,Fan Jinbiao,Yuan Xiaojie (Science and technology on electronic test & measurement laboratory,North University of China,Taiyuan 030051,China)
Abstract:The system uses the CPLD and the AVR microcontroller as a logic control core and memory test system designed posture in order to achieve collection,code frame and storage of the attitude information.Described in detail the working principle and hardware design of the attitude test system.Using AVR microcontroller to control data write,read and erase operations,use the logic control functions of CPLD to improved storage test system of the working state.Improved the reliability of the work of the storage test system.Verify the system can completed high-speed sampling and storage for the analog signal.With the advantages of CPLD,AVR microcontroller and Flash memory to achieve high-speed 8-channel data collection,it has large storage capacity,small noise,low power consumption.
Keywords:attitude measurement  CPLD  AVR
本文献已被 CNKI 维普 万方数据 等数据库收录!
设为首页 | 免责声明 | 关于勤云 | 加入收藏

Copyright©北京勤云科技发展有限公司  京ICP备09084417号