Low-temperature characterization of buried-channel NMOST |
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Authors: | Wilcox RA Chang J Viswanathan CR |
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Affiliation: | Dept. of Electr. Eng., California Univ., Los Angeles, CA; |
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Abstract: | A comprehensive characterization of buried-channel NMOS transistors at low temperatures down to 30 K is reported. The mobilities of both surface (accumulation) and bulk (buried-channel) electrons were determined as a function of surface electric field and gate bias voltage, respectively, at low temperatures. Both surface electron mobility and buried-channel electron mobility increase with decreasing temperatures. However, a peak in the buried-channel electron mobility is observed around 80 K if the neutral region extends to regions of high impurity concentrations near the surface. A modified MOSCAP (Poisson solver) was used to obtain spatial distributions of carriers and to predict the C-V curves. Low-frequency noise measurements at low temperatures were carried out at gate voltages corresponding to the accumulation, depletion, and inversion modes of operation of the device. In the accumulation mode, a 1/f dependence is observed similar to surface-channel devices. In the depletion mode, a generation-recombination type of noise is observed with a peak around 150 K. In the inversion mode, noise that is related to the hole inversion layer is observed |
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