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Single Event Transient acquisition and mapping for space device Characterization
Affiliation:1. Department of Electrical and Electronic Engineering, University of Cagliari, Cagliari, Italy;2. Intraspec Technologies, 3 avenue Didier Daurat, 31400 Toulouse, France;3. CNES, 18 avenue Edouard Belin, 31401 Toulouse Cedex 9, France;1. IM2NP-UMR7334, Polytech''Marseille, Aix-Marseille University, CNRS, Marseille, France;1. Institut Télécom/Télécom ParisTech, CNRS-LTCI UMR 5141, Paris, France;2. Center for computional science, Federal University of Rio Grande, Rio Grande, Brazil
Abstract:It is necessary for space applications to evaluate the sensitivity of electronic devices to radiations. It was demonstrated that radiations can cause different types of effects to the devices and possibly damage them [1] [2]. The interest in the effect of Single Event Transient (SET) has recently risen because of the increased ability of parasitic signals to propagate through advanced circuit with gate lengths shorter than 0.65 nm and to reach memory elements (in this case they become Single Event Upset (SEUs)). Analog devices are especially susceptible to perturbations by such events which can induce severe consequences, from simple artifacts up to the permanent fail of the device. This kinds of phenomena are very difficult to detect and to acquire, because they are not periodical. Furthermore, they can vary a lot depending on different parameters such as device technology and biasing. The main obstacle for the analysis is due to the maximum frequency of these signals, which is unknown. It is consequently difficult to set a correct sample frequency for the acquisition system. In this document a methodology to evaluate SETs in analog devices is presented. This method allows to acquire automatically these events and to easily study the sensitivity of the device by analyzing a “SETs cartography”. The advantages are different: it allows to easily acquire and analyze the SETs in an automatic way; the obtained results allow the user to accurately characterize the device under test; and, finally, the costs due to the implementation of the tests are lower than a classical analysis performed by a particle accelerator.
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