Heat dissipation assessment of through silicon via (TSV)-based 3D IC packaging for CMOS image sensing |
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| Affiliation: | 1. Department of Aerospace and Systems Engineering, Feng Chia University, Taichung, Taiwan, ROC;2. Department of Power Mechanical Engineering, National Tsing Hua University, Hsinchu, Taiwan, ROC;1. Waseda University, 3-4-1 Okubo, Shinjuku, Tokyo 169-8555, Japan;2. Toray Industries Inc., Electronic & imaging Materials Res. Labs., 3-1-2 Sonoyama, Otsu, Shiga 520-0842, Japan;3. National Institute for Material Science, 1-1 Namiki, Tsukuba, Ibaraki 305-0044, Japan;1. Science and Technology on Reliability Physics and Application of Electronic Component Laboratory, The Fifth Electronics Research Institute of the Ministry of Industry and Information Technology, Guangzhou 511370, China;2. School of Micro-Electronics, South China University of Technology, Guangzhou 510006, China;1. Laboratory of Science and Technology on Integrated Logistics Support, National University of Defense Technology, Changsha 410073, China;2. College of Intelligence Science and Technology, National University of Defense Technology, Changsha 410073, China |
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| Abstract: | The study aims at evaluation of the steady-state heat dissipation capability of a high-density through silicon via (TSV)-based three-dimensional (3D) IC packaging technology (briefly termed 3D TSV IC packaging) designed for CMOS image sensing under natural convection through finite element analysis (FEA) and thermal experiments. To enhance modeling and computational efficiency, an effective approach based on FEA incorporating a 3D unit-cell model is proposed for macroscopically and thermally simulating the heterogeneous TSV chips. The developed effective thermal conductivities are compared against those obtained from a rule-of-mixture technique. In addition, the proposed numerical models are validated by comparison with two experiments. Besides, the uncertainties in the input chip power from the specific power supply and in the measured chip junction temperature by the thermal test die are evaluated. Finally, a design guideline for improved thermal performance is provided through parametric thermal study. |
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