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Resistive switching properties of a thin SiO2 layer with CeOx buffer layer on n+ and p+ Si bottom electrodes
Affiliation:Tokyo Institute of Technology, 4259 Nagatsuta, Midori-ku, Yokohama 226-8502, Japan;Interdisciplinary Graduate School of Science and Engineering, Tokyo Institute of Technology, Yokohama 226-8502, Japan;Physical School, Shandong University, Shanda southern road 27#, 250100, China
Abstract:Resistive switching properties of a 2-nm-thick SiO2 with a CeOx buffer layer on p+ and n+ Si bottom electrodes were characterized. The distribution of set voltage (Vset) with the p+ Si bottom electrode devices reveals a Gaussian distribution centered in 4.5 V, which reflects a stochastic nature of the breakdown of the thin SiO2. Capacitance–voltage (C–V) measurements indicate the trapping of electrons by positively shifting the C–V curve by 0.2 V during the first switching cycle. On the other hand, devices with the n+ Si bottom electrodes showed a broad distribution in Vset with a mean value higher than that of p+ Si bottom electrode devices by 0.9 V. Although no charge trapping was observed with n+ Si bottom electrode devices, a degradation in interface states was confirmed, causing a tail in the lower side of the Vset distribution. Based on the above measurements, the difference in the Vset can be understood by the work function difference and the contribution of electron trapping.
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