一种高速高精度时钟的设计与分析

介绍了一种高性能时钟板的设计思想和电路分析.该时钟板基于频率合成器来产生高精度、高稳定度、低抖动的时钟,用于高速高精度背板测试平台.文中给出了实际时钟的性能分析指标,针对影响时钟性能的相关因素,提出高速时钟电路设计的解决方案,并深入探讨了时钟设计中的相关问题.测试结果表明所得时钟信号性能较好.

Design and Analysis for High-Speed and High-Precision Clock Board

The design and the character analysis in a high performence clock generating system are introduced. The system based on the frequency synthesizer can offer a high accuracy, high stability and low jitter clock for a high speed and high precision backplane test platform. The analysis on actual clock performance is provided, together with the high speed clock circuit design against correlated performance-damaging factors. The rules of the clock design are also discussed. Experimental results show that clock signals have good performances.