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Formal verification of synchronous data-flow program transformations toward certified compilers
Authors:Van Chan Ngo  Jean-Pierre Talpin  Thierry Gautier  Paul Le Guernic  Loïc Besnard
Affiliation:1. INRIA Rennes-Bretagne Atlantique, Rennes, 35042, France
2. IRISA/CNRS, Rennes, 35042, France
Abstract:Translation validation was invented in the 90’s by Pnueli et al. as a technique to formally verify the correctness of code generators. Rather than certifying the code generator or exhaustively qualifying it, translation validators attempt to verify that program transformations preserve semantics. In this work, we adopt this approach to formally verify that the clock semantics and data dependence are preserved during the compilation of the Signal compiler. Translation validation is implemented for every compilation phase from the initial phase until the latest phase where the executable code is generated, by proving the transformation in each phase of the compiler preserves the semantics. We represent the clock semantics, the data dependence of a program and its transformed counterpart as first-order formulas which are called clock models and synchronous dependence graphs (SDGs), respectively. We then introduce clock refinement and dependence refinement relations which express the preservations of clock semantics and dependence, as a relation on clock models and SDGs, respectively. Our validator does not require any instrumentation or modification of the compiler, nor any rewriting of the source program.
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