Software Assisted Digital RF Processor (DRP™) for Single-Chip GSM Radio in 90 nm CMOS |
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Authors: | Staszewski R. Staszewski R. B. Jung T. Murphy T. Bashir I. Eliezer O. Muhammad K. Entezari M. |
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Affiliation: | Texas Instruments, Dallas, TX, USA; |
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Abstract: | This paper proposes and describes a new software and application programming interface view of an RF transceiver. It demonstrates benefits of using highly programmable digital control logic in an RF wireless system realized in a digital nanoscale CMOS process technology. It also describes a microprocessor architecture design in Digital RF Processor (DRP™) and how it controls calibration and compensation for process, temperature and voltage variations of the analog and RF circuits to meet the required RF performance. A few calibration examples to reduce a DCO bias current and improve device reliability, as well as to optimize transmit modulation and receive performance, are given. The presented circuits and techniques have enabled successful implementation of a commercial single-chip GSM radio in 90 nm CMOS. |
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