Design of a large scale multimedia storage server |
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| Affiliation: | 1. Department of Cybernetics, School of Science, Tallinn University of Technology, Akadeemia tee 21, 12618 Tallinn, Estonia;2. Estonian Academy of Sciences, Kohtu 6, 10130 Tallinn, Estonia;1. College of Fisheries, Ocean University of China, Qingdao 266003, China;2. Tianjin Fisheries Research Institute, Tianjin 300221, China;3. Laboratory for Marine Fisheries and Aquaculture, Qingdao National Laboratory for Marine Science and Technology, Qingdao 266072, China;1. Department of Control Science and Engineering, Tongji University, Shanghai 201804, China;2. Department of Electrical and Computer Engineering, New Jersey Institute of Technology, Newark, NJ 07102 USA;3. Renewable Energy Research Group, King Abdulaziz University, Jeddah, Saudi Arabia;4. Department of Mathematics and Computer Sciences, Mercy College, Dobbs Ferry, NY 10522, USA;1. Advanced Research Center on Electronic Systems for Information and Communication Technologies “E. De Castro” (ARCES), University of Bologna, Bologna, Italy;2. Biosciences Laboratory, Istituto Scientifico Romagnolo per lo Studio e la Cura dei Tumori (IRST), IRCCS, Meldola, FC, Italy;3. Department of Computer Science and Engineering (DISI), University of Bologna, Bologna, Italy |
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| Abstract: | Large scale multimedia storage servers will be an integral part of the emerging distributed multimedia computing infrastructure. However, given the modest rate of improvements in storage transfer rates, designing servers that meet the demands of multimedia applications is a challenging task that needs significant architectural innovation.Our research project, called Massively-parallel And Real-time Storage (mars) architecture, is aimed at the design and prototype implementation of a large scale multimedia storage server. It uses some of the well-known techniques in parallel I/O, such as data striping and Redundant Arrays of Inexpensive Disks (raid) and an innovative atm based interconnect inside the server to achieve a scalable architecture that transparently connects storage devices to an atm-based broadband network. The atm interconnect within the server uses a custom asic called ATM Port Interconnect Controller (apic) currently being developed as a part of an arpa sponsored gigabit local atm testbed. Our architecture relies on innovative data striping and real-time scheduling to allow a large number of guaranteed concurrent accesses, and uses separation of metadata from real data to achieve a direct flow of the media streams between the storage devices and the network. This paper presents our system architecture; one that is scalable in terms of the number of supported users and the throughput. |
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