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顶栅共面结构非晶氧化物薄膜晶体管的低成本制备及性能研究
引用本文:岳兰,孟繁新.顶栅共面结构非晶氧化物薄膜晶体管的低成本制备及性能研究[J].半导体光电,2024,45(2):242-246.
作者姓名:岳兰  孟繁新
作者单位:成都大学 电子信息与电气工程学院, 成都 610106;贵州民族大学 材料科学与工程学院, 贵阳 550025;成都高新发展股份有限公司, 成都 610041
基金项目:国家自然科学基金项目(62064001);贵州省科学技术基金项目(黔科合基础-ZK[2021]一般238);贵阳市科技计划基金项目(筑科合同[2021]43-2号);贵州省优秀青年科技人才计划项目(黔科合平台人才-YQK[2023]018);贵州省教育厅青年科技人才成长项目(黔教合KY字[2017]131).通信作者:岳兰,孟繁新
摘    要:将溶液法制备的不含镓的非晶InAlZnO薄膜和有机聚甲基丙烯酸甲酯薄膜分别作为沟道层和介质层,制备了顶栅共面结构的非晶氧化物薄膜晶体管(TFT)器件,探讨了沟道层中Al含量对器件性能的影响。结果表明:Al对InZnO薄膜中氧空位的形成能起到一定抑制作用,增加Al含量即可降低沟道层中的电子载流子浓度,使得InAlZnO TFT器件阈值电压正向移动、关态电流减小,以有利于器件开关比的提升。此外,基于沟道层中Al含量的调整可通过优化沟道层/介质层界面状态来促进器件阈值电压滞回稳定性的提升。当沟道层中Al含量为30%时,制备的器件具有最佳综合性能。

关 键 词:薄膜晶体管  铟铝锌氧化物  溶液法  顶栅共面结构  低成本
收稿时间:2023/10/13 0:00:00

Low-cost Preparation and Study on the Performance of Amorphous Oxide Thin-film Transistors with A Top-gate Coplanar Structure
YUE Lan,MENG Fanxin.Low-cost Preparation and Study on the Performance of Amorphous Oxide Thin-film Transistors with A Top-gate Coplanar Structure[J].Semiconductor Optoelectronics,2024,45(2):242-246.
Authors:YUE Lan  MENG Fanxin
Affiliation:School of Electronic Information and Electrical Engineering, Chengdu University, Chengdu 610106, CHN;School of Material Science and Engineering, Guizhou Minzu University, Guiyang 550025, CHN; Chengdu High-tech Development Co., Ltd., Chengdu 610041, CHN
Abstract:Thin-film transistors (TFTs) with a top-gate coplanar structure were fabricated using a free-gallium amorphous indium-aluminum-zinc-oxide film as the active layer and a polymethyl methacrylate film as the dielectric layer based on a low-cost solution process method, and the influence of the Al content in the active layer on the device performance was investigated. The results indicated that Al atoms acted as a carrier suppressor in the InZnO films. Therefore, the carrier concentration in the InZnO film decreased with increasing Al content and hence, the threshold voltage of the device moved forward positively, the off-state current of TFTs decreased, and the on/off current ratio of the device improved. Moreover, the hysteresis stability of the threshold voltage improved via the optimization of the trap density in the interface between the active and insulator layers by adjusting the Al content of the active layer. Overall, optimum device performance was achieved at an Al content of 30%.
Keywords:thin-film transistors  indium-aluminum-zinc-oxides  solution process  top-gate coplanar structure  low cost
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