A custom-designed receiver-stimulator chip for an advancedmultiple-channel hearing prosthesis

A receiver-stimulator integrated circuit for an advanced multiple-channel cochlear implant was custom designed and fabricated successfully, using a 3-μm CMOS process with two layers of metal. The chip contains nearly all of the implant electronics, including a data receiver, digital-to-analog converter, three stimulus current generators and timing controllers, 20 output stages, and an outward telemetry subsystem. The measured power consumption of the chip when quiescent, with supply voltage of the receiver stimulator (V_DD) at 12 V and while receiving unmodulated RF carrier, was 6.8 mW. The implant's total power consumption when stimulating under worst-case conditions (three stimuli being generated at the maximum rate with maximum current levels and durations) was 45 mW