基于P2020处理器的高速数据总线接口设计

通过以Freescale公司的P2020双核处理器为核心的嵌入式硬件平台，介绍了CPU与FPGA的基于 Local Bus 接口设计具备DMA传输功能及环形缓冲的高速数据总线接口方法，以及基于 Linux3．0内核开发此接口的驱动程序的实现方法.该技术已在某宽带高速设备上应用，实际测试，其实时稳定性、数据吞吐量、链路稳定性均满足设计要求，对同类型嵌入式平台的高速数据总线接口设计及开发有借鉴意义.

High-speed Data Bus Interface Based on P2020

Taking the embedded platform using Freescale P2020 dual-core processor as the example,the high-speed data bus interface de-sign based on the local bus between CPU and FPGA is introduced,which has DMA transfer function and the ring buffer.The implemen-tation method of the driver for the interface based on Linux3 .0 kernel is also introduced.The technology has been applied in a wide band high speed device.The test results show that the stability,data throughput and link stability all meet the design requirements.The design has reference significance to the same type of embedded platform.