用于测试SDRAM控制器的PDMA

设计了一种用于测试SDRAM的可编程直接存储器存取控制模块(PDMA)，把设计的PDMA作为IP软核，在基于PCI环境的RTL仿真平台上进行功能仿真、综合并将结果下载到PFGA上，建立基于FPGA的测试平台进行硬件测试验证。结果表明，板上PDMA工作频率66MHz，达到快速访问的设计要求。PDMA仿真了多个IP与SDRAM的数据交换，并且建立在通用的PCI环境下。因此本设计方法和建立的仿真测试环境可用于不同的IP，是解决不同IP开发中十分重要的仿真测试方案，大大缩短了IP开发的测试和验证的时间，对于发展IP软核有重要意义。

A PDMA used for the testing of SDRAM controller

A programmable direct memory access (PDMA) control module is designed. As a softIP core, it is used to establish a kind of PCI protocol-based FPGA hardware verification platform,after RTL simulation, synthesis, implement and download to a FPGA with PCI IP core. The hard-ware test result shows this PDMA core achieve the design goal for fast access with work fre-quency over 66MHz. PDMA emulates the data exchange between many IPs and SDRAM simulta-neously by using the general PCI environment. So this design can be used to verify many differentcooperating IP cores at the same time, which shall be an effective and important solution for IPdevelopment. It also shortens the time-to-market of the IP product, and especially is meaningfulfor soft IP core development.