|
|||||
|
|
An ultra-low-power 1 kb sub-threshold SRAM in the 180 nm CMOS process |
|
| Authors: | Liu Ming Chen Hong Li Changmeng Wang Zhihua |
| Affiliation: | Tsinghua National Laboratory for Information Science and Technology, Institute of Microelectronics, Tsinghua University, Beijing 100084, China;Tsinghua National Laboratory for Information Science and Technology, Institute of Microelectronics, Tsinghua University, Beijing 100084, China;Tsinghua National Laboratory for Information Science and Technology, Institute of Microelectronics, Tsinghua University, Beijing 100084, China;Tsinghua National Laboratory for Information Science and Technology, Institute of Microelectronics, Tsinghua University, Beijing 100084, China |
| Abstract: | This paper presents a 1 kb sub-threshold SRAM in the 180 nm CMOS process based on an improved 11T SRAM cell with new structure. Final test results verify the function of the SRAM. The minimal operating voltage of the chip is 350 mV, where the speed is 165 kHz, the leakage power is 42 nW and the dynamic power is about 200 nW. The designed SRAM can be used in ultra-low-power SoC. |
| Keywords: | sub-threshold SRAM 11T SRAM cell ultra-low-power SoC |
| 本文献已被 CNKI 维普 等数据库收录！ | |
| 点击此处可从《半导体学报》浏览原始摘要信息 | |
| 点击此处可从《半导体学报》下载全文 | |