| 基于BIST的FPGA测试方法研究 |
| |
| 引用本文： | 高成,杨超,鹿靖,陈政平.基于BIST的FPGA测试方法研究[J].计算机与数字工程,2010,38(9):66-69. |
| |
| 作者姓名： | 高成 杨超 鹿靖 陈政平 |
| |
| 作者单位： | 北京航空航天大学可靠性与系统工程学院,北京,100191 |
| |
| 摘 要： | 文章讨论了利用内建自测试结构对FPGA内部可编程逻辑资源进行测试的方法。以基于SRAM结构的FP-GA为例,分析了一种查找表内建自测试方案在实际应用中存在的问题,并提出了一种改进测试方法,解决了综合过程中存在的不匹配问题。同时,还消除了由地址叠加造成的波形错位和周期错误,并在XC3S400芯片上完成了测试。
|
| 关 键 词： | FPGA BIST 查找表 |
Study of Test Method Based on BIST for FPGA |
| |
| Gao Cheng,Yang Chao,Lu Jing,Chen Zhengping.Study of Test Method Based on BIST for FPGA[J].Computer and Digital Engineering,2010,38(9):66-69. |
| |
| Authors: | Gao Cheng Yang Chao Lu Jing Chen Zhengping |
| |
| Affiliation: | Gao Cheng Yang Chao Lu Jing Chen Zhengping (Reliability and System Engineering School of Beihang University, Beijing 100191) |
| |
| Abstract: | The paper discusses the test method based on build in self-test for programmable logic resources of FPGA. Taking the case of the FPGA based on SRAM, it analyzes the practical problem of a build-in self-test approach for Look-up Table, propose an improvement test approach and solve the mismatch problem which happens in the process of synthesis. Meanwhile, it also eliminates the problem of waveform distortion and period error which are caused by the superposing of different addresses. We complete the test by using XC3S400. |
| |
| Keywords: | FPGA BIST |
| 本文献已被 维普 万方数据 等数据库收录！ |
|
