基于AD9501串联的顺序等效时间采样设计

顺序等效时间采样中要求高分辨率和宽延时范围的可编程数字延时电路。针对单片8位可编程脉冲延时芯片AD9501用于顺序等效时间采样时只能采集256个数据点和延时分辨率不便调整的不足,提出了将两个AD9501进行串联的设计,通过设置合适的器件外部延时参数,可以将两片8位可编程脉冲延时芯片等效成一片16位可编程脉冲延时芯片,再利用FPGA控制11位延时数据在16位延时数据总线上的位置,实现了3.2GS/s～100GS/s等效采样率、2K存储深度的可变顺序等效时间采样功能。对于测试中发现的延时不准确问题,分析和验证了其中的原因,并给出了改进措施。

Design of sequential equivalent time sampling based on double AD9501 in series

A programmable pulse delay circuit with high time resolution and long enough delay time is necessary in sequential equivalent time sampling.Since single AD9501,an 8 b programmable pulse delay chip,can only acquire 256 data points and the delay time resolution is inconvenient to change,a new design is presented based on double AD9501 in series.By means of appropriately setting the delay parameters,double 8-bits programmable pulse delay chips can be equivalent to a single 16 bits programmable pulse delay chip.Through shifting the 11 bits delay data among the 16 bits data bus by FPGA,the circuit realizes the function of changeable equivalent sampling rate from 3.2GS/s to 100GS/s and 2K in storage depth.As to the problem of inaccurate delay time found in test,the possible reasons are analyzed and verified,and the corresponding improving measures are also pointed out.