Investigation of Ta2O5/SiO2/4H-SiC MIS capacitors |
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Authors: | P. Zhao Rusli F.K. Lai J.H. Zhao |
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Affiliation: | a Microelectronics Centre, School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore 639798, Singapore b Singapore Institute of Manufacturing Technology, 71 Nanyang Drive, Singapore 638075, Singapore c Department of Physics, Auburn University, AL 36849, USA |
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Abstract: | Tantalum pentoxide (Ta2O5) deposited by pulsed DC magnetron sputtering technique as the gate dielectric for 4H-SiC based metal-insulator-semiconductor (MIS) structure has been investigated. A rectifying current-voltage characteristic was observed, with the injection of current occurred when a positive DC bias was applied to the gate electrode with respect to the n type 4H-SiC substrate. This undesirable behavior is attributed to the relatively small band gap of Ta2O5 of around 4.3 eV, resulting in a small band offset between the 4H-SiC and Ta2O5. To overcome this problem, a thin thermal silicon oxide layer was introduced between Ta2O5 and 4H-SiC. This has substantially reduced the leakage current through the MIS structure. Further improvement was obtained by annealing the Ta2O5 at 900 °C in oxygen. The annealing has also reduced the effective charge in the dielectric film, as deduced from high frequency C-V measurements of the Ta2O5/SiO2/4H-SiC capacitors. |
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Keywords: | SiC MIS Interface Ta2O5 Capacitance |
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