| 基于多ADSP-TS201的通用信号处理模块 |
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| 引用本文： | 管蓓,盛卫星. 基于多ADSP-TS201的通用信号处理模块[J]. 现代雷达, 2006, 28(9): 42-44,47 |
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| 作者姓名： | 管蓓 盛卫星 |
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| 作者单位： | 南京理工大学,南京,210094 |
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| 摘 要： | 介绍了基于CPCI总线多ADSP-201S DSP芯片的可编程通用信号处理模块的结构、工作原理和设计技术.该模块的输入输出接口采用标准低摆幅差分信号接口和标准的CPCI总线,峰值处理能力可达14.4 GFlops,通用性好,处理能力强.文中还分别介绍了如何利用该模块构成一个4波束的数字波束形成处理器,和一个可以同时对4个波束的回波信号进行线性调频信号脉冲压缩的实时雷达信号处理器.
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| 关 键 词： | 雷达 数字信号处理 CPCI总线 |
| 收稿时间： | 2006-02-26 |
| 修稿时间： | 2006-02-262006-04-18 |
Universal Signal Processing Module Based on Multiple ADSP-TS201S |
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| GUAN Bei,SHENG Wei-xing. Universal Signal Processing Module Based on Multiple ADSP-TS201S[J]. Modern Radar, 2006, 28(9): 42-44,47 |
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| Authors: | GUAN Bei SHENG Wei-xing |
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| Affiliation: | Nanjing University of Science and Technology, Nanjing 210094, China |
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| Abstract: | A programmable universal digital signal processing module constructed by multiple ADSP-TS201S DSPs is presented in detail.A low Voltage Differential Signaling(LVDS) bus and Compact Peripheral Component Interconnection(CPCI) bus are used in this module.The computational performance of this module can be up to 14.4Gflops per second.The configuration and some design considerations of this module are suggested.Two examples of application are also introduced.One is used for Digital Beam Forming(DBF) processor;another is for linear frequency modulation pulse compression. |
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| Keywords: | radar digital signal processing CPCI bus |
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