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一种基于SiGe BiCMOS的高速采样/保持电路
引用本文:潘星,王永禄,张正平,张俊安. 一种基于SiGe BiCMOS的高速采样/保持电路[J]. 微电子学, 2008, 38(6)
作者姓名:潘星  王永禄  张正平  张俊安
作者单位:1. 重庆邮电大学,重庆,400065;模拟集成电路国家级重点实验室,重庆,400060
2. 模拟集成电路国家级重点实验室,重庆,400060;中国电子科技集团公司,第二十四研究所,重庆,400060
摘    要:设计了一种基于BiCMOS工艺的高速采样/保持电路,该工艺提供了180 nm的CMOS和75 GHz fT的SiGe HBT.差分交换式射极跟随器和低下垂输出缓冲器的结合,使电路具有更好的性能.在Cadence Spectre环境下进行仿真,当输入信号为968.75 MHz、Vpp为1 V的正弦波,采样速率为2 GSPS时,该采样/保持电路的SFDR达到62.2 dB,THD达到-59.5 dB,分辨率达到9位;在3.3 V电源电压下,电路功耗为20 mW.

关 键 词:采样/保持电路  差分交换式射极跟随器  低下垂输出缓冲器

High-Speed Sample-and-Hold Circuit Based on SiGe BiCMOS Technology
PAN Xing,WANG Yong-lu,ZHANG Zheng-ping,ZHANG Ju-nan. High-Speed Sample-and-Hold Circuit Based on SiGe BiCMOS Technology[J]. Microelectronics, 2008, 38(6)
Authors:PAN Xing  WANG Yong-lu  ZHANG Zheng-ping  ZHANG Ju-nan
Affiliation:PAN Xing~(1,2) WANG Yonglu~(2,3) ZHANG Zhengping~(2,3) ZHANG Jun'an~(2,3) (1.Chongqing University of Posts , Telecommunications,Chongqing 400065,P.R.China,2.National Laboratory of Analog ICs,Chongqing 400060,3.Sichuan Institute of Solid State Circuits,China Electronics Technology Group Corp.,P.R.China)
Abstract:A high-speed sample-and-hold circuit was presented based on BiCMOS technology,which provides 180 nm CMOS transistors and SiGe HBTs with an f_T of 75 GHz.Differential switched emitter follower and low-droop output buffer were combined to improve the circuit performance.Simulated with Cadence Spectre,this sample-and-hold circuit achieves an SFDR of 62.2 dB,a THD of -59.5 dB and a resolution of 9 bits for 968.75 MHz sinusoidal input of 1 V(V_(pp))at 2 GHz sampling rate.And the circuit consumes 20 mW of power f...
Keywords:BiCMOS
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