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基于加权Gray码及实时状态检测的异步FIFO设计
引用本文:刘祥远,陈书明. 基于加权Gray码及实时状态检测的异步FIFO设计[J]. 计算机工程与科学, 2007, 29(7): 91-95
作者姓名:刘祥远  陈书明
作者单位:国防科技大学计算机学院,湖南,长沙,410073;国防科技大学计算机学院,湖南,长沙,410073
基金项目:国家自然科学基金 , 高等学校博士学科点专项科研项目
摘    要:本文提出了一种新颖的异步FIFO设计,它采用加权Gray码进行指针编码,采用实时的全局状态检测器来控制写/读,是一种高性能的异步FIFO。模拟结果表明,在FIFO深度为4~16的情况下,该设计与已有的FIFO设计相比在性能以及面积开销等方面都获得了明显的改善。该异步FIFO在多核SoC互连设计中具有广泛的应用前景。

关 键 词:异步FIFO  同步器  高性能Gray码
文章编号:1007-130X(2007)07-0091-05
修稿时间:2006-09-252006-12-28

An Asynchronous FIFO Design Based on Weighted Gray Coding and Real-Time State Detection
LIU Xiang-yuan,CHEN Shu-ming. An Asynchronous FIFO Design Based on Weighted Gray Coding and Real-Time State Detection[J]. Computer Engineering & Science, 2007, 29(7): 91-95
Authors:LIU Xiang-yuan  CHEN Shu-ming
Affiliation:School of Computer Science,National University of Defense Tedmology,Changsha 410073,China
Abstract:A novel asynchronous FIFO design is presented in this paper. It employs a weighted gray code as the write/ read pointer code,and controls write/read operations using a real-time global state detector. It is a high-performance asynchronous FIFO design. Simulation results show that the performance and area cost are both considerably improved compared with other available FIFOs under the depth range of 4-16. The asynchronous FIFO can be widely used in the interconnect design of multi-core SoC.
Keywords:asynchronous FIFO   synchronizer   high performance   Gray code
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