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The impact of gate misalignment on the analog performance of a dual-material double gate junctionless transistor
Authors:S. Intekhab Amin and R. K. Sarin
Affiliation:Department of Electronics and Communication Engineering, Dr.B.R.Ambedkar National Institute of Technology Jalandhar, Punjab, 144011, India
Abstract:The analog performance of gate misaligned dual material double gate junctionless transistor is demonstrated for the first time. The cases considered are where misalignment occurs towards source side and towards drain side. The analog performance parameters analyzed are: transconductance, output conductance, intrinsic gain and cut-off frequency. These figures of merits (FOMs) are compared with a dual material double gate inversion mode transistor under same gate misalignment condition. The impacts of different length of control gate (L1) for a given gate length (L) are also studied and the optimum lengths L1 under misalignment condition to have better analog FOMs and high tolerance to misalignment are presented.
Keywords:dual material double gate (DMDG)  junctionless transistor  inversion mode transistor  gate misalignment  analog FOMs
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