开关电流电路延迟线的设计

详细分析了开关电流（SI）电路第二代存储单元的传输函数和主要缺点,在此基础上设计了延迟线电路,并减小了电路中的时钟馈通误差和传输误差。HSpice仿真结果表明,该电路能精确地对输入信号进行采样保持,并且能无失真延迟任意时钟周期,可作为离散时间系统的基本单元电路。

Design of Delay-line Circuit in Switched-current Circuit

The transfer function and main defects of the second-generation memory-cell in the switched-current circuit are analyzed.Based on the analysis,the delay-line circuit which can reduce the clock feedthrough erors and transfer errors in the circuit was designed.The simulation results in HSpice show that the circuit can sample and keep the input signal accutately,delay any clock periods without distortion,and can be taken as the basic unit circuit of a discrete time system.