基于规则的寄存器传输级ALU工艺映射算法的研究

提出寄存器传输级工艺映射（RTLM）算法，该算法支持使用高层次综合和设计再利用的现代VLSI设计方法学，允许复杂的RT级组件，尤其是算术逻辑单元（ALU）在设计中重用，该映射算法使用目标ALU组件来实现源ALU组件，映射规则通过表格的方式给出，此算法对于规则结构的数据通路特别有效，应用k阶贪婪算法的实验结果表明，RTLM在高层次综合中对数据通路组件再利用是一种有效的方法。

Rule Based Register-Transfer Level ALU Mapping Algorithm

Register Transfer Level Mapping (RTLM) algorithm for technology mapping at RT level is presented, which supports current day design methodologies using high level design and design reuse. The mapping rules implement a source ALU using target ALU. The source ALUs and target ALUs were all represented by the general ALUs and the mapping rules were applied in the algorithm. The mapping rules were described in a table form. The mapping algorithm is well suited for mapping of regularly structured data path. Comparisons were made between the experimental results generated by 1 greedy algorithm and k greedy algorithm, showing the feasibility of presented algorithm.