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16.8GHz 4分频器芯片设计
引用本文:吴南民,卢彦民.16.8GHz 4分频器芯片设计[J].电子世界,2014(12):131-132.
作者姓名:吴南民  卢彦民
作者单位:南京模拟技术研究所
摘    要:本文设计的16.8GHz 1:4分频器是由两个1:2分频器构成,1:2分频器采用单时钟动态负载锁存器结构。由于它们工作在不同的速率上,虽然结构相同,但参数配置不同,分别以高速和低功耗为优化目标进行电路设计。仿真结果和流片测试结果均表明在该芯片在16.8GHz下可以实现4分频功能。

关 键 词:分频器  高频传输  芯片设计

16.8GHz 4-Frequency Divider Chip Design
Wu Nan-min;Lu Yan-min.16.8GHz 4-Frequency Divider Chip Design[J].Electronics World,2014(12):131-132.
Authors:Wu Nan-min;Lu Yan-min
Affiliation:Wu Nan-min;Lu Yan-min;Nanjing Research Institute on Simulation Technique;
Abstract:The 16.8GHz 1:4 frequency divider was made of two 1:2 frequency dividers which were both based on single clock dynamic-loading latches.Because these two 1:2 frequency dividers worked at different frequencies,they had the same architecture but different parameters.In the design of these two dividers,high speed and low power were their targets, separately.With a careful optimization and test,the chip can operate at 16.8 GHz.
Keywords:4-Frequency Divider  High Frequency transfer  Chip Design
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