| 单偏置电压多位分布式MEMS传输线移相器 |
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| 引用本文： | 邓成,鲍景富,杜亦佳,凌源,赵兴海,郑英彬.单偏置电压多位分布式MEMS传输线移相器[J].微纳电子技术,2012,49(2):102-107. |
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| 作者姓名： | 邓成 鲍景富 杜亦佳 凌源 赵兴海 郑英彬 |
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| 作者单位： | 1. 电子科技大学电子工程学院,成都,611731
2. 中国工程物理研究院电子工程研究所,四川 绵阳,621900 |
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| 基金项目： | 国家自然科学基金委员会和中国工程物理研究院联合基金资助项目，国家部委基金项目，中国工程物理研究院科学技术发展基金资助项目 |
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| 摘 要： | 针对传统多位分布式MEMS传输线(DMTL)移相器需要多个偏置电压控制的问题,提出了一种单电压控制多位DMTL移相器的设计方案。这种移相器的每一位具有不同的弹性系数,因此它们的下拉电压各不相同。给出了这种移相器的相关理论、设计实例及仿真结果。通过仿真结果可知,单偏置电压3位DMTL移相器低位到高位的下拉电压分别为19.73,40.49和74.89 V,低位发生下拉时高位相移偏移小于0.062%(10 GHz,2.925×10-4 rad)。单偏置电压4位DMTL移相器低位到高位的下拉电压分别为19.73,32.55,48.41和74.89 V,低位发生下拉时高位相移偏移小于0.094%(10 GHz,4.425×10-4 rad)。
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| 关 键 词： | 射频微机电系统(RFMEMS) 分布式MEMS传输线移相器 下拉电压 单偏置电压 相移偏移 |
Multi-Bit DMTL Phase Shifters with the Single Bias Voltage |
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| Deng Cheng
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Bao Jing fu
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Du Yi jia
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Ling Yuan
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Zhao Xing hai
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Zheng Ying bin.Multi-Bit DMTL Phase Shifters with the Single Bias Voltage[J].Micronanoelectronic Technology,2012,49(2):102-107. |
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| Authors: | Deng Cheng Bao Jing fu Du Yi jia Ling Yuan Zhao Xing hai Zheng Ying bin |
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| Affiliation: | 1.School of Electronic Engineering,University of Electronic Science and Technology of China, Chengdu 611731,China;2.Research Institute of Electronic Engineering,China academy of engineering physics,Mianyang 621900,China) |
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| Abstract: | The multi-bit distributed MEMS transmission line(DMTL) phase shifter with the single bias voltage was proposed to reduce the number of bias for the requirement of the traditional multi-bit DMTL phase shifter.Each bit of the DMTL phase shifter has a beam with different spring constants,thus the pull-in voltages of which are different.The related theory,designed example and simulation result based on the phase shifter were given.The result shows that the pull-in voltages of 3-bit DMTL phase shifter with single bias are 19.73,40.49 and 74.89 V,respectively.The phase shift offset of the high bit is lower than 0.062%(10 GHz,2.925×10-4 rad),when the low bit is pulled in.The pull-in voltages of 4-bit DMTL phase shifter with single bias are 19.73,32.55,48.41 and 74.89 V,respectively.The phase shift offset of the high bit is lower than 0.094%(10 GHz,4.425×10-4 rad),when the low bit is pulled in. |
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| Keywords: | radio frequency micro-electromechanical system(RF MEMS) DMTL phase shifter pull-in voltage single bias voltage phase shift offset |
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