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EV8AQ160型ADC在2.5 Gsps双通道高速信号采集系统中的应用
引用本文:蔡春霞,吴琼之,丁一辰.EV8AQ160型ADC在2.5 Gsps双通道高速信号采集系统中的应用[J].电子设计工程,2011,19(20):148-152.
作者姓名:蔡春霞  吴琼之  丁一辰
作者单位:北京理工大学信息与电子学院,北京,100081
摘    要:针对某高速实时频谱仪中的高速模数转换器(ADC)的应用,基于信号采集系统硬件平台,介绍了一种最大采样率可达5 Gbps的高速8位A/D转换器EV8AQ160。该器件内部由4路并行的ADC构成,各路ADC可并行工作也可交错工作。详细描述了EV8AQ160在交错模式下的工作原理,介绍了其在某双通道高速信号采集系统中的应用,给出了EV8AQ160与Xilinx公司Virtex-6 FPGA的接口设计方案以及系统结构框图,并用ISE的在线逻辑分析仪(ChipScope Pro)测试了ADC性能。把ADC输出的数据存储在DDR3中,然后进行FFT变换,进而分析ADC的信噪比及有效位数,实测表明整体指标达到设计要求。

关 键 词:高速ADC  EV8AQ160  高速信号采集  Virtex-6FPGA

Application of ADC EV8AQ160 in the 2.5 Gsps high-speed signal acquisition system
CAI Chun-xia,WU Qiong-zhi,DING Yi-chen.Application of ADC EV8AQ160 in the 2.5 Gsps high-speed signal acquisition system[J].Electronic Design Engineering,2011,19(20):148-152.
Authors:CAI Chun-xia  WU Qiong-zhi  DING Yi-chen
Affiliation:(School of Information and Electronics,Beijing Institute of Technology,Beijing 100081,China)
Abstract:For the applications of high-speed analog to digital converter (ADC) in a high-speed real-time spectrum analyzer, introduced a maximum sampling rate can up to 5 Gbps high-speed 8-bit A/D converter EV8AQ160. The device is integrated with four parallel ADCs which can work not only in parallel mode but also in interleaved mode. Described EV8AQ160's working principle in an interleaved mode in detail, and introduced its application in dual-channel signal acquisition system, proposed EV8AQ160 with Xilinx corporation Virtex-6 FPGA interface design and the system block diagram, and used ISE ChipScope Pro to test the ADC performance. Stored the output data of ADC into DDR3, then carried on FFT transformation, further analyzed the ADC SNR (Signal-to-Noise Ratio) and ENOB (Effective Number of Bits). The practice proved the overall targets meet the design requirements.
Keywords:high-speed ADC  EV8AQ 160  high-speed signal acquisition  Virtex-6 FPGA
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