一种基于FPGA的二维DCT和IDCT的新算法

提出了一种新的二维DCT和IDCT的FPGA实现结构,采用行列快速算法将二维算法分解为两个一维算法实现,其中每个一维算法采用并行的流水线结构,每一个时钟处理8个数据,大大提高电路的数据吞吐率和运算速度。通过Modelsim仿真工具对该设计进行仿真,证明该算法的功能的正确性,进行一次8*8的分块二维DCT变换仅仅需要16个时钟,满足图像以及视频实时性的要求。

A new algorithm of two dimesion DCT and IDCT based on FPGA

A new algorithm of two dimentional cosine transform （DCT） and inverse discrete cosine transform （IDCT）based on FPGA is presented. The architecture uses a row-column decompostion to break the 2-D algorithm into two 1-D algorithm. The I-D algorithm uses the parallel pipling architecture and one clock can process 8 datas that makes the circuit work with high data throughput and speed. Through the design tools of Modelsim and Quartus, the circuit is simulated and verified. The result shows the corroctness of the design and it can finish a two dimesional DCT or IDCT in 16 clocks,so it can meet the requirement of real_time in video processing.