Optimizing the power-sensitivity trade-off in TRF receivers

There is an inevitable trade-off between the sensitivity of an RF receiver and its total power consumption, meaning that in order to design a receiver with a high sensitivity, more power must be dissipated. Ultra-low power receivers in general and wake-up receivers in particular require a sensitivity of better than ?70 dBm while the power consumption should be as low as possible at the same time. Therefore, obtaining an optimum point where these two design specifications are met is of great interest. In this work, we present a design methodology for the tuned radio frequency (TRF) receiver topology, which yields an optimum power-sensitivity product for given design parameters. The most interesting outcome of this study is finding an optimum number of amplifier stages at the front-end of the receiver that leads to a minimum power-sensitivity product. It is shown through analytical/graphical approach in Matlab that the optimum number of stages resulting in the minimum power-sensitivity product can be different from the optimum number of amplifier stages leading to the maximum overall gain-bandwidth product. These results are also verified through circuit-level simulation with Cadence Spectre for practical design parameters. According to our study, the minimum power-sensitivity product occurs for a two-stage amplifier with moderate gain at the front-end of the TRF receiver.