Ultra-Thin Si1−xGex Dislocation Blocking Layers for Ge/Strained Si CMOS Devices

We demonstrate ultra-thin (<150 nm) Si_1−x Ge _x dislocation blocking layers on Si substrates used for the fabrication of tensile-strained Si N channel metal oxide semiconductor (NMOS) and Ge P channel metal oxide semiconductor (PMOS) devices. These layers were grown using ultra high vacuum chemical vapor deposition (UHVCVD). The Ge mole fraction was varied in rapid, but distinct steps during the epitaxial layer growth. This results in several Si_1−x Ge _x interfaces in the epitaxially grown material with significant strain fields at these interfaces. The strain fields enable a dislocation blocking mechanism at the Si_1−x Ge _x interfaces on which we were able to deposit very smooth, atomically flat, tensile-strained Si and relaxed Ge layers for the fabrication of high mobility N and P channel metal oxide semiconductor (MOS) devices, respectively. Both N and P channel metal oxide semiconductor field effect transister (MOSFETs) were successfully fabricated using high-k dielectric and metal gates on these layers, demonstrating that this technique of using ultra-thin dislocation blocking layers might be ideal for incorporating high mobility channel materials in a conventional CMOS process.