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Silicon based system in package: Improvement of passive integration process to avoid TBMS failure

Authors:	Christian Gautier Sophie Ledain Sébastien Jacqueline Matthieu Nongaillard Vincent Georgel Karine Danilo

Affiliation:	1. Department of Analytical, Environmental and Geochemistry, Vrije Universiteit Brussel, Pleinlaan 2, 1050 Brussels, Belgium;2. Département des Sciences de la Terre et de l''Environnement, Université Libre de Bruxelles, 50, Avenue F.D. Roosevelt, B-1050 Bruxelles, Belgium;3. Research Group of Electrochemical and Surface Engineering, Vrije Universiteit Brussel, Pleinlaan 2, 1050 Brussels, Belgium;4. Department of Art History and Archaeology, Vrije Universiteit Brussel, Pleinlaan 2, 1050 Brussels, Belgium;1. Department of Applied Chemistry, Graduate School of Engineering, Osaka Prefecture University, 1-1 Gakuencho, Naka-ku, Sakai, Osaka 599-8531, Japan;2. Energy Use R&D Center, The Kansai Electric Power Co., Inc., 11-20-3 Nakoji, Amagasaki, Hyogo 661-0974, Japan

Abstract:	Because of its large dimension and its high level of integration, the PICS (Passive Integration Connecting Substrate) developed by NXP prone to top to bottom metal short (TBMS) failure during temperature cycling test. Several options of process modifications as well as new design rules and stress relief patterns for preventing TBMS failure are described. These countermeasures have been evaluated under high thermo-mechanical stress test. The results of these evaluations are also presented in this paper.

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