基于FPGA的Golay码编译码器

短波信道中存在突发随机错误,为提高短波通信的可靠性,设计了一种基于FPGA的Golay码编译码器,用于纠正这种随机错误。编码器中编码工作由Golay码生成矩阵完成;译码器应用了一种基于Golay码奇偶校验矩阵的结构性质的快速译码算法完成译码和纠错。为充分利用Spartan-II芯片的硬件资源,编译码器采用了流水线方式与并行方式,并提高了系统时钟频率。该设计既有专用ASIC电路的快速性,又有DSP器件的灵活性。波形仿真结果表明了该Golay编译码器设计的正确性。

The Design of Golay Decoder Based on FPGA

There are burst random errors in the short wave channel.For improving the reliability of short wave communications,based on FPGA,this paper designs an applied decoder of Golay code to correct these random errors.The Golay code generator matrix in encoder answers for encoding.The decoder is in charge of decoding and correcting with the adopted fast decoding algorithm which is based on the structure properties of Golay code.The design makes the most of hardware resource Spartan-II chip,and adopts pipeline and parallel mode in order to improve the system clock and decode speed.The design not only has a high speed of ASIC,but also an agility of DSP.The simulation indicates the correctness of the design.