A 40-GHz frequency divider in 0.18-/spl mu/m CMOS technology |
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| Authors: | Lee J. Razavi B. |
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| Affiliation: | Electr. Eng. Dept., Univ. of California, Los Angeles, CA, USA; |
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| Abstract: | An analysis of regenerative dividers predicts the required phase shift or selectivity for proper operation. A divider topology is introduced that employs resonance techniques by means of on-chip spiral inductors to tune out the device capacitances. Configured as two cascaded /spl divide/2 stages, the circuit achieves a frequency range of 2.3 GHz at 40 GHz while consuming 31 mW from a 2.5-V supply. |
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