一种基于FPGA实现的真随机数发生器 |
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引用本文: | 张润捷.一种基于FPGA实现的真随机数发生器[J].中国集成电路,2008,17(11):52-55. |
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作者姓名: | 张润捷 |
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作者单位: | 浙江大学信息技术与工程学院 |
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摘 要: | 本文分析和实现了一种基于FPGA的真随机数发生器,采用对延迟链各级输出同时采样的方法来增加输出序列的随机性。电路为纯数字形式,50MHz采样时钟采得的输出数据可以无需后处理,直接通过随机性测试,且未发现随机性与采样频率存在显著联系。
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关 键 词: | 真随机数发生器 延迟链 FPGA |
FGPA-based True Random Number Generator |
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Abstract: | An FPGA- based true random number generator ( TRNG ) is proposed. It collects output signals from the delay chain at the same time in order to enhance the randomness of the output sequence. The solution is in a pure digital fashion. Sequences generated at a bit rate of 50 MHz can pass randomness test without being post-processed. Furthermore, variation of the sampling frequency does not affect the randomness of the output sequence |
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Keywords: | FPGA |
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