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Aluminum dual damascene metallization for 0.175 μm DRAM generations and beyond (invited) |
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| Authors: | R. F. Schnabel L. A. Clevenger G. Costrini D. M. Dobuzinsky R. Filippi J. Gambino G. Y. Lee R. C. Iggulden C. Lin Z. G. Lu X. J. Ning R. Ramachandran M. Ronay D. T bben S. J. Weber |
| Affiliation: | a Siemens Microelectronics, DRAM Development Alliance, IBM Semiconductor Research and Development Center, 1580 Route 52, Hopewell Junction, NY 12533, USA b IBM Microelectronics, 1580 Route 52, Hopewell Junction, NY 12533, USA c IBM Research, Yorktown Heights, NY 10598, USA |
| Abstract: | This paper presents an overview of issues associated with Al dual damascene process technology. Different integration schemes are discussed and characteristics of metal fill, planarization and reliability are highlighted. Finally, a comparison is made between Al dual damascene, Al RIE, and Cu dual damascene. |
| Keywords: | Dual damascene Al Integration Low-k dielectrics Reliability Metallization CMP Chemical mechanical polishing |
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