| 基于优先级调度的高速大容量FIFO缓存设计 |
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| 引用本文： | 焦义文,王元钦,马宏,张书仙.基于优先级调度的高速大容量FIFO缓存设计[J].装备指挥技术学院学报,2011,22(2):108-112. |
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| 作者姓名： | 焦义文 王元钦 马宏 张书仙 |
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| 作者单位： | 1. 装备指挥技术学院光电装备系,北京,101416
2. 装备指挥技术学院科研部,北京,101416 |
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| 摘 要： | 针对甚长基线干涉测量(very long baseline interferometry,VL-BI)数据采集记录系统对高速大容量先进先出(first in first out,FIFO)缓存的需求以及现有解决方案的不足,提出了一种基于优先级调度的高速大容量FIFO缓存设计方案:设计将同步动态随机存储器(synchronous dynamic random access memory,SDRAM)划分成环形缓存链,并依据提出的设计参考原则,合理分配任务量和设定优先级判据,通过任务号的管理,实现了一个标准的高速大容量异步FIFO缓存。性能测试结果表明,该设计融合了时分法和多体法的优点,面积开销小,实时性强,最高持续读写速度达680MB/s,容量利用率近100%。
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| 关 键 词： | 优先级调度 先进先出 甚长基线干涉测量 环形缓存链 |
Design of a High-speed and Deep FIFO Buffer Based on Priority Scheduling |
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| JIAO Yiwen,WANG Yuanqin,MA Hong,ZHANG Shuxian.Design of a High-speed and Deep FIFO Buffer Based on Priority Scheduling[J].Journal of the Academy of Equipment Command & Technology,2011,22(2):108-112. |
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| Authors: | JIAO Yiwen WANG Yuanqin MA Hong ZHANG Shuxian |
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| Affiliation: | JIAO Yiwen1,WANG Yuanqin2,MA Hong1,ZHANG Shuxian1 (1. Department of Optical and Electrical Equipment,the Academy of Equipment Command & Technology,Beijing 101416,China,2. Department of Scientific Research,China) |
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| Abstract: | To cover the need for the high-speed and deep FIFO in VLBI data-acquisition and recording system and the shortages of the existing solutions, a new design scheme of a high-speed and deep FIFO buffer based on priority scheduling is presented in this paper: the design seen SDRAM as ring-like buffer chain, based on the proposed design principles, allocated the amount of tasks and set the criteria of priorities reasonably, through the management of task numbers, a standard high-speed and deep asynchronous FIFO ... |
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| Keywords: | priority scheduling first in first out(FIFO) very long baseline interferometry(VLBI) ring-like buffer chain |
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